The laboratory, founded in 2005, conducts research focusing mainly on the domain of hardware implementation of image processing algorithms in FPGA circuits. We are actively exploring this field of research and have successfully completed projects involving nonlinear and linear image filtering, point and edge feature extraction, feature matching, optical flow and motion estimation. We have also experimented with hardware implementation of spiking neurons with supervised learning capabilities. The designs are hardware-proven and allow high-speed image/information processing with a small footprint, low power architecture.
Our competences include also the design and implementation of embedded systems for control, measurement and monitoring.